This paper proposes an effective methods to reconfigure a two-dimensional degradable extensive scale joining/wafer scale incorporation (VLSI/WSI) cluster under the line and section steering imperatives, which has been appeared to be NP-finished. The proposed VLSI/WSI exhibit comprises of indistinguishable preparing components, for example, processors or memory cells inserted in a 6-port switch cross section as a rectangular lattice. It has been demonstrated that the proposed VLSI structure with 6-port switches wipes out the need to fuse inward sidestep inside preparing components and prompts striking increment in the gather when contrasted and the one utilizing 4-port switches. Another voracious rerouting calculation and pay approaches are likewise proposed to boost gather through reconfiguration. Trial results demonstrate that the proposed VLSI exhibit with 6-port switches reliably outflanks the most proficient option proposed in writing, toward boosting the reap within the sight of blame preparing components.